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? semiconductor components industries, llc, 2011 september, 2011 ? rev. 0 1 publication order number: NCN3612B/d NCN3612B 6-channel differential 1:2 switch for pcie 3.0 and displayport 1.2 the NCN3612B is a 6 ? channel differential spdt switch designed to route pci express gen3 and/or displayport 1.2 signals. due to the ultra ? low on ? state capacitance (2.1 pf typ) and resistance (8 typ), this switch is ideal for switching high frequency signals up to a signal bit rate (br) of 8 gbps. this switch pinout is designed to be used in btx form factor desktop pcs and is available in a space ? saving 5x11x0.75 mm wqfn56 package. the NCN3612B uses 80% less quiescent power than other comparable pcie switches. features ? btx pinout ? v dd power supply from 3 v to 3.6 v ? low supply current: 250 a typ ? 6 differential channels, 2:1 mux/demux ? compatible with display port 1.2 & pcie 3.0 ? data rate: supports 8 gbps ? low r on resistance: 8 typ ? low c on capacitance: 2.1 pf ? space saving, small wqfn ? 56 package ? this is a pb ? free device typical applications ? notebook computers ? desktop computers ? server/storage networks figure 1. application schematic graphics and memory controller hub (gmch) display port connector pcie graphics (peg) connector pci express graphics (peg) NCN3612B in_0 +/ ? in_1 +/ ? in_2 +/ ? in_3 +/ ? x +/ ? out +/ ? d0 +/ ? d1 +/ ? d2 +/ ? d3 +/ ? hpd1/hpd2 aux +/ ? tx0 +/ ? tx1 +/ ? tx2 +/ ? tx3 +/ ? rx0 +/ ? rx1 +/ ? pcie buff1 pcie buff2 pcie buff3 pcie buff4 pcie in aux device package shipping ? ordering information NCN3612Bmttwg wqfn56 (pb ? free) 2000 / tape & reel wqfn56 case 510ak marking diagram http://onsemi.com a = assembly location wl = wafer lot yy = year ww = work week g = pb ? free package ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specifications brochure, brd8011/d. NCN3612B awlyywwg 1
NCN3612B http://onsemi.com 2 logic control figure 2. NCN3612B block diagram in_0+ out+ sel le d0+ d0 ? d1+ d1 ? d2+ d2 ? d3+ d3 ? in_0 ? in_1+ in_1 ? in_2+ in_2 ? in_3+ in_3 ? out ? x+ x ? tx0+ tx0 ? tx1+ tx1 ? tx2+ tx3+ tx3 ? aux+ aux ? hpd1 hpd2 rx0+ rx0 ? rx1+ rx1 ? tx2 ? truth table (sel control) function sel pci express gen3 path is active (tx, rx) l digital video port is active (d, hpd, aux) h truth table (latch control) le internal mux select l respond to changes on sel h latched
NCN3612B http://onsemi.com 3 1 2 3 4 5 21 48 47 46 45 44 18 19 20 31 30 29 figure 3. pinout (top view) 22 23 25 26 27 28 56 55 54 53 52 51 50 49 gnd vdd rx1 ? rx1+ rx0 ? rx0+ vdd gnd gnd vdd d0+ d0 ? d1+ d1 ? vdd gnd gnd gnd gnd gnd sel le in_0+ in_0 ? x+ x ? d2+ d2 ? d3+ d3 ? hpd1 hpd2 24 6 7 8 9 10 11 12 13 14 15 16 17 43 42 41 40 39 38 36 35 34 33 32 vdd in_1+ in_1 ? in_2+ in_2 ? gnd in_3+ in_3 ? out+ out ? gnd vdd tx0+ tx0 ? tx1+ tx1 ? tx2+ tx2 ? tx3+ tx3 ? gnd vdd aux+ aux ? 37 exposed pad on underside (solder to external gnd)
NCN3612B http://onsemi.com 4 pin function and description pin name description 6, 17, 22, 27, 34,50, 55 vdd dc supply, 3.3 v 10% 1, 11, 16, 20, 21, 28, 29, 35, 48, 49, 56 gnd power ground. exposed pad ? the exposed pad on the backside of package is internally connected to gnd. externally the exposed pad should also be user ? connected to gnd. 2 sel sel controls the mux through a flow ? through latch. do not float this pin. sel = 0 for pcie mode; sel = 1 for dp mode 3 le le controls the latch gate. do not float this pin. 4 in_0+ differential input from gmch pcie outputs. in_0+ makes a differential pair with in_0 ? . 5 in_0 ? differential input from gmch pcie outputs. in_0 ? makes a differential pair with in_0+. 7 in_1+ differential input from gmch pcie outputs. in_1+ makes a differential pair with in_1 ? . 8 in_1 ? differential input from gmch pcie outputs. in_1 ? makes a differential pair with in_1+. 9 in_2+ differential input from gmch pcie outputs. in_2+ makes a differential pair with in_2 ? . 10 in_2 ? differential input from gmch pcie outputs. in_2 ? makes a differential pair with in_2+. 12 in_3+ differential input from gmch pcie outputs. in_3+ makes a differential pair with in_3 ? . 13 in_3 ? differential input from gmch pcie outputs. in_3 ? makes a differential pair with in_3+. 14 out+ pass ? through output from aux+ input when sel = 1. pass ? through output from rx0+ input when sel = 0. 15 out ? pass ? through output from aux ? input when sel = 1. pass ? through output from rx0 ? input when sel = 0. 18 x+ x+ is an analog pass ? through output corresponding to rx1+. 19 x ? x ? is an analog pass ? through output corresponding to the rx1 ? input. the path from rx1 ? to x ? must be matched with the path from rx1+ to x+. x+ and x ? form a differential pair when the pass ? through mux mode is selected. 23 rx1 ? differential input from pcie connector or device. rx1 ? makes a differential pair with rx1+. rx1 ? is passed through to the x ? pin on the path that matches the rx1+ to x+ pin. 24 rx1+ differential input from pcie connector or device. rx1+ makes a differential pair with rx1 ? . rx1+ is passed through to the x+ pin when sel = 0. 25 rx0 ? differential input from pcie connector or device. rx0 ? makes a differential pair with rx0+. rx0 ? is passed through to the out ? pin when sel = 0. 26 rx0+ differential input from pcie connector or device. rx0+ makes a differential pair with rx0 ? . rx0+ is passed through to the out+ pin when sel = 0. 30 hpd2 negative low frequency hpd input handshake protocol signal (normally not connected). 31 hpd1 positive low frequency hpd input handshake protocol signal. 32 aux ? differential input from hdmi/dp connector. aux ? makes a differential pair with aux+. aux ? is passed through to the out ? pin when sel = 1. 33 aux+ differential input from hdmi/dp connector. aux+ makes a differential pair with aux ? . aux+ is passed through to the out+ pin when sel = 1. 37, 36 tx3+, tx3 ? analog pass ? through output#2 corresponding to in_3+ and in_3 ? when sel = 0. 39, 38 tx2+, tx2 ? analog pass ? through output#2 corresponding to in_2+ and in_2 ? when sel = 0. 41, 40 tx1+, tx1 ? analog pass ? through output#2 corresponding to in_1+ and in_1 ? when sel = 0. 43, 42 tx0+, tx0 ? analog pass ? through output#2 corresponding to in_0+ and in_0 ? when sel = 0. 45, 44 d3+, d3 ? analog pass ? through output#1 corresponding to in_3+ and in_3 ? , when sel = 1. 47, 46 d2+, d2 ? analog pass ? through output#1 corresponding to in_2+ and in_2 ? , when sel = 1. 52, 51 d1+, d1 ? analog pass ? through output#1 corresponding to in_1+ and in_1 ? , when sel = 1. 54, 53 d0+, d0 ? analog pass ? through output#1 corresponding to in_0+ and in_0 ? , when sel = 1.
NCN3612B http://onsemi.com 5 maximum ratings parameter symbol rating unit power supply voltage v dd ? 0.5 to 5.3 v dc input/output voltage range of the switch (tx, rx, d, hpd, aux, in_, out, x) v is ? 0.5 to v dd + 0.3 v dc selection pin voltages (sel and le) v in ? 0.5 to v dd + 0.3 v dc continuous current through one switch channel i is 120 ma maximum junction temperature (note 1) t j 150 c operating ambient temperature t a ? 40 to +85 c storage temperature range t stg ? 65 to +150 c thermal resistance, junction ? to ? air (note 2) r ja 37 c/w latch ? up current (note 3) i lu 100 ma human body model (hbm) esd rating (note 4) esd hbm 7000 v machine model (mm) esd rating (note 4) esd mm 400 v moisture sensitivity (note 5) msl level 1 ? stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. power dissipation must be considered to ensure maximum junction temperature (t j ) is not exceeded. 2. this parameter is based on eia/jedec 51 ? 7 with a 4 ? layer pcb, 80 mm x 80 mm, two 1oz cu material internal planes and top planes of 2oz cu material. 3. latch up current maximum rating: 100 ma per jedec standard: jesd78. 4. this device series contains esd protection and passes the following tests: human body model (hbm) 7.0 kv per jedec standard: jesd22 ? a114 for all pins. machine model (mm) 400 v per jedec standard: jesd22 ? a115 for all pins. 5. moisture sensitivity level (msl): 1 per ipc/jedec standard: j ? std ? 020a.
NCN3612B http://onsemi.com 6 electrical characteristics (v dd = +3.3v 10%, t a = ? 40 c to +85 c, unless otherwise noted. all typical values are at v dd = +3.3 v, t a = +25 c, unless otherwise noted.) symbol characteristics conditions min typ max unit power supply v dd supply voltage range 3.0 3.3 3.6 v i dd power supply current v dd = 3.6 v, v in = gnd or v dd 250 350 a data switch performance (for both pcie and displayport applications, unless otherwise noted) v is data input/output voltage range 0 1.2 v r on on resistance (tx, rx) v dd = 3 v, v is = 0 v to 1.2 v, i is = 15 ma 8.0 13 r on on resistance (d, hpd, aux) v dd = 3 v, v is = 0 v to 1.2 v, i is = 15 ma 9.0 13 r on(flat) on resistance flatness v dd = 3 v, v is = 0 v to 1.2 v, i is = 15 ma (note 6) 0.1 1.24 r on on resistance matching (tx, rx) v dd = 3 v, v is = 0 v, i is = 15 ma 0.35 r on on resistance matching (d, hpd, aux) v dd = 3 v, v is = 0 v, i is = 15 ma 0.35 c on on capacitance f = 1 mhz, switch on, open output 2.1 pf c off off capacitance f = 1 mhz, switch off 1.6 pf i on on leakage current (in_/ x/out) v dd = 3.6 v, v in_ = vx = v out = 0 v, 1.2 v; switch on to d/hpd/aux or tx/rx; outputs unconnected ? 1 +1 a i off off leakage current (d/tx/hpd/rx/aux) v dd = 3.6 v, v in_ = v x_ = v out_ = 0 v, 1.2 v; switch off; v d = v hpd = v aux or v d = v hpd = v aux set to 1.2 v, 0 v ? 1 +1 a control logic characteristics (sel and le pins) v il off voltage input 0 0.8 v v ih high voltage input 2 v dd v i in off voltage input v in = 0 v or v dd ? 1 +1 a c in high voltage input f = 1 mhz 1 pf dynamic characteristics br signal data rate 8 gbps d il differential insertion loss f = 100 mhz ? 0.7 db f = 2.7 ghz ? 1.3 f = 4 ghz ? 2 d iso differential off isolation f = 100 mhz ? 54 db f = 2.7 ghz ? 23 f = 4 ghz ? 18 d ctk differential crosstalk f = 100 mhz ? 50 db f = 2.7 ghz ? 32 f = 4 ghz ? 30 d rl differential return loss f = 100 mhz ? 20 db f = 3.7 ghz ? 10 f = 4 ghz ? 5 6. guaranteed by characterization and/or design.
NCN3612B http://onsemi.com 7 switching characteristics (v dd = +3.3 v, t a = 25 c, unless otherwise specified) symbol characteristics conditions min typ max unit t b ? b bit ? to ? bit skew within the same differential pair 7 ps t ch ? ch channel ? to ? channel skew maximum skew between all channels 55 ps selection pins switching characteristics (v dd = +3.3 v, t a = 25 c, unless otherwise specified) symbol characteristics conditions min typ max unit t selon sel to switch turn on time v is = 1 v, r l = 50 , v le = v dd , c l = 100 pf 9.5 ns t seloff sel to switch turn off time v is = 1 v, r l = 50 , v le = v dd , c l = 100pf 5 ns t set le setup time sel to le v is = 1 v, r l = 50 , v le = v dd , c l = 100 pf 1 ns t hold le hold time le to sel v is = 1 v, r l = 50 , v le = v dd , c l = 100 pf 1 ns
NCN3612B http://onsemi.com 8 typical operating characteristics figure 4. reference displayport 1.2 eye diagram without switch at 5.4 gbps, 340 mv pp differential swing figure 5. displayport 1.2 eye diagram through NCN3612B at 5.4 gbps, 340 mv pp differential swing figure 6. reference pcie 3.0 eye diagram without switch at 8 gbps, 800 mv pp differential swing figure 7. pcie 3.0 eye diagram through NCN3612B at 8 gbps, 800 mv pp differential swing
NCN3612B http://onsemi.com 9 typical operating characteristics 0 100000000 1e+09 1e+10 ? 2 ? 4 ? 6 ? 8 ? 10 ? 12 ? 14 frequency (hz) magnitude (db) figure 8. differential insertion loss 0 10000000 100000000 1e+09 1e+1 0 ? 10 ? 20 ? 30 ? 40 ? 50 ? 60 ? 70 ? 80 ? 90 magnitude (db) frequency (hz) figure 9. differential crosstalk 0 10000000 100000000 1e+09 1e+10 ? 10 ? 20 ? 30 ? 40 ? 50 ? 60 ? 70 ? 80 frequency (hz) magnitude (db) figure 10. differential off isolation 0 100000000 1e+09 1e+1 0 ? 5 ? 10 ? 15 ? 20 ? 25 magnitude (db) frequency (hz) figure 11. differential return loss 5 7 9 10 11 0 0.5 1 1.5 2 12 v cc =3.0 v cc =3.3 v cc =3.6 8 6 figure 12. r on vs. v is v is (v) r on , on resistance ( )
NCN3612B http://onsemi.com 10 parameter measurement information figure 13. differential insertion loss (s dd21 ) and differential return loss (s dd11 ) figure 14. differential off isolation (s dd21 ) figure 15. differential crosstalk (s dd21 ) figure 16. bit ? to ? bit and channel ? to ? channel skew figure 17. t on and t off figure 18. off state leakage figure 19. on state leakage t skew = |t plh1 -t plh2 | or |t phl1 -t phl2 |
NCN3612B http://onsemi.com 11 package dimensions wqfn56 5x11, 0.5p case 510ak ? 01 issue a seating 0.15 c (a3) a a1 b 1 56 56x l 56x bottom view top view side view d a b e 0.15 c pin one location 0.10 c 0.08 c c e a 0.10 b c 0.05 c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimensions: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30mm from the terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. dim min max millimeters a 0.70 0.80 a1 ??? 0.05 a3 0.20 ref b 0.20 0.30 d 5.00 bsc d2 2.30 2.50 e 11.00 bsc 8.50 e2 8.30 e 0.50 bsc l 0.30 0.50 k plane soldering footprint* l1 ??? 0.15 note 4 e/2 e2 d2 note 3 detail b l1 detail a l alternate constructions l a 0.10 b c k dimensions: millimeters 5.30 8.50 2.50 0.50 0.63 0.35 56x 56x pitch 11.30 pkg outline 1 recommended a 0.10 b c 0.20 min *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 NCN3612B/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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